Projects / memtest86+ / Releases

All releases of memtest86+

  •  21 Aug 2010 19:39
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    Release Notes: Support was added for Core i7 Extreme CPU (32nm), Core i5/i3 (32 nm), Pentium Gxxxx (32 mn), Westmere-based Xeon, and AMD 6-core CPUs. Preliminary support was added for Intel Sandy Bridge. Detection for Intel 3200/3210 was added. A new installer for USB keys was added. A crash at startup was corrected. Many other bugs were fixed.

    •  22 Sep 2009 21:26
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      Release Notes: Major architectural changes were made. The first pass is twice as fast because the iterations were reduced. DDR2/3 brands and part numbers on Intel DDR2/3 chipsets are detected. Detection was added for Intel "Clarkdale" CPU, Intel "Gulftown" CPU, AMD "Magny-Cours" CPU, Intel XMP Memory, and CPUs with 0.5, 1.5, 3, 6, 12, 16, 18, or 24 MB of L3. "Clean" DMI detection was added for DDR3/FBDIMM2. Detection of Integrated Memory Controllers was improved. Detection was corrected for Intel "Lynnfield" CPU and AMD 45nm K10 CPU. A crash with AMD Geode LX was solved. The program now complies with SMBIOS 2.6.1 specs. Compilation issues with gcc 4.2+ were fixed. Many other bugs were fixed.

      •  22 Dec 2008 19:16
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        Release Notes: This release adds support for the Intel Core i5 (Lynnfield) CPU, Intel P55 Southbridge, Intel PM45/GM45/GM47 Mobile chipset, and Intel GL40/GS45 Mobile chipset. It corrects DDR2/DDR3 detection on Intel x35/x45, corrects detection on some Core i7 CPUs, fixes a bug with some AMI BIOS (freeze at startup), and has various bugfixes.

        •  16 Nov 2008 10:00
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          Release Notes: Support was added for Intel Core i7 (Nehalem) CPU, Intel Atom Processors, Intel G41/G43/G45 Chipsets, Intel P43/P45 Chipsets, Intel US15W (Poulsbo) Chipset, Intel EP80579 (Tolapai) SoC CPU, ICH10 Southbridge (SPD/DMI), and Intel 5000X. A workaround was added for DDR3 DMI detection. The program is now fully aware of a CPU with L3 cache (Core i7 & K10). Intel 5000Z chipset detection, Memory Frequency on AMD K10, and cache detection on C7/Isaiah CPU were fixed.

          •  25 May 2008 12:38
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            Release Notes: Support for new CPUs and chipsets was added. An optional beep mode was added. Pass duration was reduced by 20%. The blinking cursor was removed. Test #0 was reverted to cached. Some bugs were fixed.

            •  17 Jan 2007 08:12
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              Release Notes: A new DMI polling feature was added. Support for Core/Core2 Solo/Duo/Quad CPUs was added. Support for AMD K8 with DDR2 Memory was added. Support for Intel CPUs with 192/384 KB L2 Cache was added. Support for FB-DIMM based memory (DMI) was added. Detection for ALI CyberAladdin-T (M1644) was added. Detection for Turion 64 X2 was added. Detection for AMD K8 with unknown chipsets was added. Support for ATi Radeon xPress 3200 was added. Support for Intel i975X was added. Support for Intel Q965/P965 was added. Support for Intel Q963/Q965 was added. Some bugs were fixed.

              •  25 Oct 2005 09:53
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                Release Notes: This release added support for Intel Conroe/Merom/Woodcrest, Intel Yonah (0.65nm), Intel Presler (0.65nm), B-Step Smithfield, ALi/ULi 1689 and 1695, and ATi RS482. Problems with some P4 chips being detected as Pentium D were fixed along with a bug with RAS detection on i955X and with K5 L1 detection size. "Mhz" was changed to "MHz" and some code was rewritten to avoid warnings with GCC 4.

                •  09 Feb 2005 22:33
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                  Release Notes: This release adds support for the Intel i945P/G (Lakeport), Intel i915PM/GM (Alviso), Intel E7520 (Lindenhurst), Intel E7520 (Lindenhurst-VS), and P4 6xx series. All Athlon 64 detection code (for 90nm) has been rewritten. An uncached test is back in Menu 1 (experimental). Dual DDR-I not being detected on i915P/G has been fixed. A DDR333/400 ratio error on i915P/G has been fixed. Failure to detect i855, DDR333, and Celeron M Dothan has been fixed. There are other minor bugfixes.

                  •  30 Dec 2004 09:51
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                    Release Notes: This version is based on Memtest86 3.2. New "random pattern" tests were added for stronger verification. Many bugs in the original mt86 3.2 code were solved. An issue with the Lakeport chipset was solved. Many other bugfixes were made. Enhancements made in version 1.30 include a "Fast" Mode (with MTRR & L1/L2 Caches on), support for VIA K8T890, on-the-fly timing changes on some chipsets, i852/855 on-the-fly timing change, a rewritten caches-off function, and some other bugfixes.

                    •  04 Nov 2004 13:12
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                      Release Notes: Several CPUs and chipsets were added. Code optimization was done. Several bugs were removed.

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